1. Field of the Invention
The present invention relates to radio frequency (RF) switches, that is RF switches operating from about 400 MHz to more than 3 GHz or about in the L-band. Even more particularly the present invention relates to silicon CMOS RF switches.
2. Background Information
Available solid state RF switches are generally made using galium arsenide (GaAs) processes. The GaAs and possibly the silcon/germanium processes are accepted as having higher frequency responses than silicon processes (electron mobility is five to ten times higher in GaAs than in silicon). GaAs chips can be made reasonably small and handle sufficient power with switch characteristics that have made these processes acceptable L-band switches. For example NEC produces an L-band SPDT (single pole double throw) GaAs switch designated uPG152TA.
However, chips made via these processes are more costly than those made using the standard silicon processes, and the known L-band switches do not include the standard electrostatic protection devices (ESD) at the outputs due to performance degradation.
There are known RF switches made using standard silicon process, one such circuit is shown in FIG. 1. This circuit is switched on or off via the gate signal 2. Five volts at the NMOS gate turns the switch on and ground at the gate turns the switch off.
Ideally an on switch would have zero channel and substrate resistances and the parasitic capacitance from the source, the drain and between the source and drain would be zero as would the stray inductances. The approach toward the ideal has been to scale the switch down to minimize the capacitance but allowing the channel and substrate resistances to increase. The tradeoff results in a capacitance between the drain and source that is not small enough therefore passing too much signal when the switch was off.
It is an object of the present invention to provide an RF switch using silicon processes with better OFF isolation and insertion loss, and that will accommodate a standard ESD pad at the switch output.
In view of the foregoing background discussion, the present invention provides an NMOS transistor switch with its source biased to a reference level. The NMOS switch gate is biased high (on), thereby passing the RF signal when Vgs greater than Vt and off when Vgs less than Vt thereby preventing the RF signal from passing. A lower bias voltage level (less than Vg) is applied to the source turning it on, and a second bias voltage level close to Vg (Vgxe2x88x92Vs less than Vt) is applied to turn off the NMOS switch.
The higher and lower bias voltages are selectively applied in response to a logic on/off signal. There is a switch that performs a single pole double throw function to connect the higher or the lower bias signals to the source of the NMOS. The switch is preferably two PMOS transistors with inverse logic drives to their respective gates to turn only one of the PMOS switches on at a time. Diodes may be connected between the PMOS switches and the source of the NMOS.
In contrast to known RF switches, the RF output in the present invention may be connected to an ESD device with insubstantial performance degradation.
It will be appreciated by those skilled in the art that although the following Detailed Description will proceed with reference being made to illustrative embodiments, the drawings, and methods of use, the present invention is not intended to be limited to these embodiments and methods of use. Rather, the present invention is of broad scope and is intended to be defined as only set forth in the accompanying claims.